LS SIMD协处理器是用于底层图像理解的16位定点嵌入式阵列处理器,该处理器除SIMD固有的数据并行性外,还具有三级流水和三组指令并发执行的并行性。主要阐述LS SIMD协处理器的三级流水线和三组指令并发执行的基本可重用的主控制器设计。
LS SIMD coprocessor which is 16 bit fixed point embedded array coprocessor is used to solve the low image comprehension. The coprocessor has triple instructions pipelining and parallel of three-group in structions except the inhered data parallel of the SIMD processor. The design of the basic reused main controller of the LS SIMD coprocessor with triple instruc tions pipelining and parallel of three-group instructions is mostly described i n the paper.